George Moujaes
Papers
1
Total Citations
5
H-Index
1
About
George Moujaes is a leading researcher in computer architecture, with a focus on efficient hardware acceleration for machine learning and robotics. His key contributions lie in the design of heterogeneous system-on-chips (SoCs) that bridge the gap between computation and memory, enabling high-performance, low-power inference. His most notable work, the NeCTAr (Near-Cache Transformer Accelerator) and RASoC, introduced in a 2024 paper, presents a 16nm heterogeneous multicore RISC-V SoC that integrates both near-core and near-memory accelerators. This prototype chip, operating at 400MHz and 0.85V, achieves an impressive 109 GOPS for matrix-vector multiplications, demonstrating a novel approach to handling sparse and dense machine learning kernels. While his work has garnered early citations, its impact is poised to grow as the demand for efficient edge and robotics computing intensifies. Moujaes’s research is pivotal for advancing real-time language model inference and robotic control, marking him as a rising innovator in the field of energy-efficient, domain-specific architectures.
Research Focus
Key Achievements
Top Papers
- 1