Reza Sajadiany
Papers
1
Total Citations
5
H-Index
1
About
Reza Sajadiany is a rising star in computer architecture, with research focused on designing specialized hardware accelerators for machine learning and robotics. His major contributions center on heterogeneous system-on-chip (SoC) designs that bridge the gap between computation and memory. In his highly cited work, "NeCTAr and RASoC: Tale of Two Class SoCs for Language Model Interference and Robotics in Intel 16," Sajadiany introduces NeCTAr, a 16nm heterogeneous multicore RISC-V SoC that integrates near-core and near-memory accelerators for both sparse and dense machine learning kernels. This prototype chip, operating at 400MHz and 0.85V, achieves an impressive 109 GOPS for matrix-vector multiplications, demonstrating a practical path toward efficient language model inference. With 5 citations in just a year, this work has quickly gained attention for its innovative approach to tackling memory bottlenecks in AI workloads. Sajadiany’s research is particularly notable for its focus on real-world deployment in robotics, where low-latency, energy-efficient processing is critical. His work exemplifies the future of domain-specific architectures, making him a key figure to watch in the evolution of intelligent, edge-computing systems.
Research Focus
Key Achievements
Top Papers
- 1