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Applying temporal logic verification and synthesis to manufacturing systems

Marco Antoniotti, Mohsen A. Jafari, Bud Mishra

发表年份
2002
引用次数
3

摘要

In this paper we describe an application of a prototype system that combines synthesis and verification techniques, capable of building discrete controller software for a variety of robotics and manufacturing tasks. We developed and used the CONTROL-D tool to specify the requirements of a real life example: a tray pack line built for the Combat Ration Advanced Manufacturing Technology Demonstration of Rutgers University.

关键词

Computer scienceVariety (cybernetics)Controller (irrigation)RoboticsSoftwareSoftware engineeringTemporal logicManufacturing engineeringArtificial intelligenceSystems engineering

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