A High-Throughput Low-Latency Interface Board for SpiNNaker-in-the-loop Real-Time Systems

摘要

The Spiking Neural Network Computer Architecture (SpiNNaker) is a massively parallel computing system. As one of the most widespread platforms in the emerging field of neuromorphic engineering, SpiNNaker targets three main areas of research: computational neuroscience, computer science, and robotics. For the latter, the promise of low power computation and the potential for large scale simulations in real-time make SpiNNaker very attractive, especially for autonomous mobile applications. In this context, research groups typically use SpiNNaker's Ethernet interface to inject and extract sensori-motor signals into and from SpiNNaker. However, in cases where the data throughput increases, the on-board Ethernet port constitutes a critical bottleneck. Some groups have overcome such a problem to some extent by developing their own I/O interfaces to connect external devices --- sensors and actuators --- directly to SpiNNaker. However, such custom-developed interfaces allow only limited general applications, and they don't fully exploit the high-speed FPGA-based interconnect offered by the 48-chip SpiNNaker boards.