Angelo Garofalo

About

Angelo Garofalo is a leading researcher in energy-efficient artificial intelligence hardware, specializing in the design of ultra-low-power System-on-Chip (SoC) architectures for AI-enabled Internet-of-Things (AI-IoT) applications. His work focuses on enabling complex tasks like augmented reality, personalized healthcare, and nano-robotics within power envelopes of just tens of milliwatts. Garofalo’s major contributions include the development of heterogeneous RISC-V-based SoCs that integrate precision-scalable Deep Neural Network (DNN) accelerators, supporting 2-to-8-bit computations to balance performance and energy efficiency. His flagship work, "22.1 A 12.4TOPS/W @ 136GOPS AI-IoT System-on-Chip," has garnered 34 citations and demonstrates a remarkable 12.4 TOPS/W efficiency, enhanced by a 30% boost from adaptive body biasing. Additionally, Garofalo has advanced on-line testing methodologies for RISC-V processors in safety-critical autonomous systems, such as nano-drones and robots. His research, published in top venues like ISSCC, is pivotal for the next generation of intelligent, autonomous edge devices that must operate reliably under stringent power and computational constraints.

Research Focus

Key Achievements

Top Papers

1. 1
   22.1 A 12.4TOPS/W @ 136GOPS AI-IoT System-on-Chip with 16 RISC-V, 2-to-8b Precision-Scalable DNN Acceleration and 30%-Boost Adaptive Body Biasing

   34 citations · 2023
2. 2
   On-line Testing for Autonomous Systems driven by RISC-V Processor Design Verification

   12 citations · 2019
3. 3
   Marsellus: A Heterogeneous RISC-V AI-IoT End-Node SoC with 2-to-8b DNN Acceleration and 30%-Boost Adaptive Body Biasing

   2 citations · 2023

Key Collaborators

Contact & Links