Sachin S. Sapatnekar

University of Minnesota, University of Minnesota System

Papers

Total Citations

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About

Sachin S. Sapatnekar is a leading figure in electronic design automation (EDA) and VLSI CAD, with a research focus on the intersection of hardware design, optimization algorithms, and emerging computing paradigms. His work bridges classical graph theory and modern AI hardware, developing specialized architectures for computationally intensive problems. Sapatnekar’s contributions include pioneering time-based in-memory computing for graph algorithms, as demonstrated by his work on a 40×40 four-neighbor graph ASIC chip that accelerates single-source shortest path problems—critical for applications in robot navigation and autonomous vehicles. He also leads the development of composable chiplet libraries for AI inference, addressing the scalability challenges of monolithic chips in the era of large language models like GPT-4. Additionally, his research on coupled oscillator-based Ising chips for combinatorial optimization showcases innovative approaches to solving NP-hard problems. With over 11,000 citations, Sapatnekar’s work has had a profound impact on both academic research and practical hardware design, earning him recognition as a Fellow of the IEEE and ACM. His achievements include the IEEE Circuits and Systems Society Mac Van Valkenburg Award and the Semiconductor Research Corporation Technical Excellence Award.