Yaotian Liu

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About

Yaotian Liu is a leading researcher at the forefront of AI hardware and computer architecture, with a primary focus on enabling scalable, efficient, and composable systems for next-generation artificial intelligence. His most significant contribution is the development of CLAIRE (Composable Chiplet Libraries for AI Inference), a pioneering framework that addresses the critical challenge of scaling AI computation beyond the limits of monolithic chip design. By introducing a modular, chiplet-based architecture, Liu’s work provides a practical pathway to assemble powerful AI accelerators from smaller, reusable components, dramatically improving flexibility and reducing manufacturing costs. This foundational research, published in 2025, has already garnered 4 citations, signaling its early impact on the field. Liu’s contributions are particularly vital as models like GPT-4 and LLaMAv3 demand ever-greater computational resources, pushing traditional hardware to its technological limits. His work not only offers a solution to these pressing bottlenecks but also lays the groundwork for more sustainable and customizable AI hardware ecosystems, positioning him as a key innovator in the future of AI infrastructure.