Mitsuki Hinosugi
Papers
2
Total Citations
4
H-Index
2
About
Mitsuki Hinosugi’s research focuses on high-speed VLSI circuit design for digital signal processing and real-time control systems, with a particular emphasis on arithmetic logic units. Hinosugi’s major contribution is the development of a high-speed cellular array divider that incorporates a selection function based on the non-restoring algorithm. This design enables efficient handling of both fixed-point and variable-precision division, addressing the growing demand for faster computational components in applications such as robot control and digital signal processing. Although the two most-cited papers have modest citation counts (2 each), they represent foundational work in optimizing divider architectures for VLSI implementation. Hinosugi’s research is notable for bridging theoretical algorithm design with practical VLSI evaluation, demonstrating how cellular array structures can achieve significant speed improvements without excessive area overhead. This work contributes to the broader field of computer arithmetic, where efficient division remains a critical challenge. For students and researchers interested in high-performance VLSI design and arithmetic unit optimization, Hinosugi’s papers offer valuable insights into balancing speed, area, and functionality in real-time processing hardware.
Research Focus
Key Achievements
Top Papers
- 1
- 2