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SOMANET Motion Core
by Synapticon
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Specifications
- Core (count)
- 8 to 32 programmable 32-bit RISC cores per chip
- Bus speed mbps
- 400
- Clock rate m hz
- 62.5 to 500
- Safe motion level
- SIL3-PLe
- Safe motion protocol
- FSoE (FailSafe over EtherCAT)
Overview
SOMANET Motion Core is the system-on-chip platform behind all SOMANET servo drives. It combines xCore and ARM processors for deterministic real-time motion control using a software-first approach. Features 8 to 32 programmable 32-bit RISC cores per chip, clock rates 62.5–500 MHz, and a 400 Mbit/s processor bus. Supports advanced control algorithms like MPDC and FOC. Configurable via OBLAC Tools. Safe motion up to SIL3-PLe via FSoE.
Key features
- ▸Combines xCore and ARM processors for deterministic real-time motion control
- ▸8 to 32 programmable 32-bit RISC cores per chip, clock rate 62.5–500 MHz
- ▸400 Mbit/s processor bus with unified real-time process communication
- ▸Advanced control algorithms: MPDC, FOC, auto-tuning, cogging compensation, feedforward
- ▸Configurable via OBLAC Tools software
- ▸Safe motion functions up to SIL3-PLe via FSoE
- ▸Software-first approach: update motion control algorithms, safety functions, fieldbus protocols without hardware changes
- ▸Low heat dissipation despite high motion control frequencies
- ▸Disturbance compensation for sensor noise, nonlinearity, torque ripple
- ▸High motion quality even with low-cost motors and sensors