VLSI fuzzy chip and inference accelerator board systems
Hiroyuki Watanabe, James R. Symon, W.D. Dettloff, K.E. Yount
- 发表年份
- 2002
- 引用次数
- 44
摘要
The architecture and operational features of a VLSI fuzzy logic inference processor are described. Also described are the architecture and associated high-level software of two VMEbus-board systems based on the fuzzy chip. The VLSI implementation of a fuzzy logic inference mechanism allows the use of rule-based control and decision making in demanding real-time applications. The CMOS chip consists of 688000 transistors, of which 476000 are used for RAM memory. In addition to operating in a robot, the single chip board is installed on a Sun-3 workstation for further research and software development.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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