VERMA ISHITA

About

Ishita Verma is a computer engineer specializing in digital system design, VLSI architecture, and processor development. Her most cited work, "Design and Implementation of a 64-bit RISC Processor Using VHDL" (2009, 15 citations), presents a groundbreaking approach to integrating built-in self-test (BIST) capabilities directly into RISC processor architecture. This contribution addresses a critical challenge in modern computing: enabling processors to autonomously verify their own functionality without external testing equipment. By implementing a 64-bit reduced instruction set processor with self-testing mechanisms in VHDL, Verma demonstrated how to enhance reliability and reduce testing costs in embedded systems. Her work has influenced subsequent research in fault-tolerant processor design and self-diagnostic digital systems. The paper's enduring relevance—still cited over a decade after publication—reflects its foundational role in advancing processor self-testing methodologies. Verma's research bridges the gap between theoretical VLSI design and practical implementation, offering engineers a pathway to more robust, self-monitoring computing architectures. Her contributions continue to inform developments in reliable processor design for safety-critical applications.

Research Focus

Key Achievements

Top Papers

1. 1
   Design and Implementation of a 64-bit RISC Processor Using VHDL

   15 citations · 2009

Key Collaborators

Contact & Links