Pranav Bhasker

Jaypee University of Information Technology

Papers

Total Citations

H-Index

About

Pranav Bhasker is a computer engineer recognized for pioneering work in processor architecture and built-in self-test (BIST) mechanisms. His research centers on RISC processor design, VLSI implementation, and hardware reliability—areas critical to advancing efficient, self-testing computing systems. Bhasker’s most cited work, “Design and Implementation of a 64-bit RISC Processor Using VHDL” (2009, 15 citations), introduces a novel processor with integrated BIST capabilities, enabling autonomous hardware testing without external equipment. This contribution addresses a fundamental challenge in modern chip design: ensuring reliability as transistor densities increase. By embedding self-test features directly into the processor architecture, Bhasker’s work has influenced subsequent research in fault-tolerant computing and low-power embedded systems. His approach demonstrates how VHDL-based design can streamline verification while maintaining performance. Though his citation count reflects a focused, early-career impact, the practical relevance of his BIST-integrated processor continues to resonate in fields like aerospace and automotive electronics, where system self-diagnostics are paramount. Bhasker’s research offers students a clear example of how architectural innovation can solve real-world hardware reliability problems.