Double-precision floating-point format

Related papers: 2

Top Cited Papers

Parameterizable floating-point library for arithmetic operations in FPGAs

Diego F. Sánchez, Daniel M. Muñoz, Carlos H. Llanos, Maurício Ayala-Rincón

Citations: 19 • 2009

Analysis of effects of using exponent adders in IEEE-754 multiplier by VHDL

Ragini Parte, Jitendra Kumar Jain

Citations: 9 • 2015