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A Spiking Silicon Central Pattern Generator with Floating Gate Synapses

Francesco V. Tenore, R. Jacob Vogelstein, Ralph Etienne‐Cummings, Gert Cauwenberghs, M. Anthony Lewis, P. Hasler

Year
2005
Citations
13

Abstract

A programmable array of silicon neurons for the creation of central pattern generator (CPG) networks is described. The design consists of 20 integrate-and-fire neurons, each with multiple synaptic inputs and tunable spike frequency adaptation circuitry. The synapse area is reduced by 80% relative to our previously fabricated chip by using floating gate transconductance amplifiers in place of current DACs. In addition to describing the design of the silicon neurons and synapses, we present results illustrating performance characteristics of the circuits and show how elaborate and biologically-plausible CPG networks can be implemented by controlling synaptic weights. The patterns generated by these circuits are shown to be sufficient to control a biped robot with a variety of different locomotory gaits.

Keywords

Central pattern generatorComputer scienceElectronic circuitGenerator (circuit theory)AmplifierSynapseTransconductanceChipElectronic engineeringTransistor

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