An FPGA-Based Low-Power Mobile-NetV2 Accelerator

摘要

Convolutional neural networks (CNNs) have been widely recognized and applied in the field of robotics. However, the huge amount of computation and parameters of CNN bring great challenges to its deployment on mobile terminals. MobileNet series networks have achieved excellent performance in edge scenarios. In this paper, we propose a low power FPGA-based accelerator using MobileNetV2 as the target network. Finally, the accelerator is implemented on Xilinx MPSOC-XCZU9EG FPGA, and achieves 70.8% Top-1 accuracy under 8-bit quantization, using 74% BRAM, 68% DSP, and 85% LUT. The final power consumption is 5.014W at 150M clock frequency.