Shashank Gavel

National Institute of Technology Raipur

Papers

1

Total Citations

2

H-Index

1

About

Shashank Gavel is a researcher focused on efficient digital signal processing architectures, with a particular emphasis on Field-Programmable Gate Array (FPGA) implementations. His work centers on optimizing computationally intensive algorithms, such as the Fast Fourier Transform (FFT), for real-time and resource-constrained applications. Gavel’s notable contribution includes the development of a Radix-4-based two-dimensional FFT architecture, which incorporates an efficient data reordering scheme to enhance throughput and reduce hardware complexity. This work, published in 2020, explores both pipelined and non-pipelined implementations, offering flexible solutions for high-performance signal processing. While his citation count is still growing—with his most cited paper garnering 2 citations—his research demonstrates a strong foundation in hardware acceleration and algorithm optimization. Gavel’s contributions are particularly relevant for applications in communications, image processing, and radar systems, where fast and efficient FFT computation is critical. His work represents a step forward in bridging algorithmic efficiency with practical hardware design, making him a promising voice in the field of reconfigurable computing.

Research Focus

Key Achievements

1
H-Index
1
Papers
2
Total Citations
2
Avg Citations/Paper
🏆 Most Cited Paper
FPGA Implementation of Radix-4-Based Two-Dimensional FFT with and Without Pipelining Using Efficient Data Reordering Scheme
2 citations · 2020
📈 Most Prolific Year: 2020 (1 Papers)
🤝 Key Collaborators: 2
🏛 Institutions: National Institute of Technology Raipur

Top Papers

  1. 1

Key Collaborators

Contact & Links

Available for collaboration
Content generated · 13 days ago