Energy-Efficient Pose-Estimation FPGA-Accelerator for Real-Time Mobile V-SLAM Robot

Abstract

Visual Simultaneous Localization and Mapping (V-SLAM) refers to the process by which a robot estimates its pose using a camera, enabling localization and mapping. Nonlinear optimization-based SLAM systems exhibit high robustness and are widely applied. Real-time SLAM systems demand high computational speed for front-end visual odometry, requiring the assistance of high-performance platforms. To achieve low power consumption and high-performance real-time visual SLAM systems, we propose a reconfigurable FPGA accelerator for robot pose estimation. In this paper, we present a high-performance parallel linear equation solver and introduce an outlier rejection algorithm to enhance the robustness of the system. The proposed pose estimation accelerator can be employed in various feature-matching-based SLAM systems. We capitalize on the reusability and parallelism specific to SLAM, achieving over 14 times the computational speed and over 40 times the energy efficiency compared to Intel i7-10875H platform. With 75 matched feature points input and 50 optimization iterations, the maximum frame rate can reach up to 229 fps.