A 325 FPS Corner-Detection Accelerator with Hardware-Oriented Optimization

Abstract

Simultaneous Localization and Mapping(SLAM) is an important technology in robot positioning and navigation. In visual odometry, the extraction accuracy and efficiency of corner detection directly affects the performance of the system. However, due to the complexity of corner detection algorithms, it is difficult to meet the requirements of real-time, efficient, and low-cost simultaneously, especially on robots. GFTT corner detection based on Harris has good performance in accuracy. However, hardware implementation increases computational complexity and resource consumption. In this work, an optimized corner detection accelerator is proposed to replace GFTT, which is hardware-friendly to be implemented on edge embedded devices. Without significant loss of accuracy, its computational complexity and hardware resource consumption are greatly reduced, and it can be good candidate for FPGA and ASIC designs. The detection image frame rate can reach 325 fps that outperforms the previous works.