A CCD-Based Parallel Analog Processor

Abstract

The development of a CCD-based parallel analog processor is described. The singleinstruction, multiple-data (SIMD) architecture allows substantial throughput improvements when compared to conventional serial image processing hardware. The heart of the concept is a single-chip array of analog processing elements interconnected with a two-dimensional CCD shift register network. The same analog operation is performed on all cells simultaneously. The device shows great promise in medium resolution (100 x 100) applications (such as guided weapons and robotics) where it can be directly interfaced with a staring focal plane through bump interconnections.