Hardware Architecture of EKF-SLAM's Prediction Stage and its FPGA Implementation

Abstract

Simultaneous Localisation and Mapping (SLAM) allows robot equipped with sensors to map its environment while locating itself in space. However, due to the computational complexity of SLAM algorithms, researches are focusing on reducing computation complexity and developing embedded systems on low resources and low complexity platforms to achieve real time requirements. Field-Programmable Gate Array (FPGA) is an attractive real-time platform for SLAM systems as they are low power and high performance. In this work, we present an EKF-SLAM (Extended Kalman Filter SLAM) prediction stage hardware architecture design and implementation on FPGA. We implemented the design using an FPGA Cyclone 2. The design can reach up to 114 MHz and uses 3507 logic elements, and it respect the real time requirements.