Needs review
Neoverse CSS V3
Specifications
- Cxl lanes
- 64
- Pcie gen5 lanes
- 64
- Max cores per subsystem
- 64
- Max ddr5 lpddr5 channels
- 12
- Ml performance uplift percent
- 96
- Int performance uplift percent
- 12
- Rdb performance uplift percent
- 16
- Crypto performance uplift percent
- 9
- Performance per socket uplift percent
- 50
Overview
Arm Neoverse CSS V3 is a pre-validated compute subsystem for high-performance, TCO-optimized cloud AI platforms. It integrates Neoverse V3 cores, CMN S3 mesh, memory controllers, and system IP, supporting up to 64 cores, 12 DDR5 channels, and 64 PCIe Gen5/CXL lanes. It enables chiplet-based designs and confidential computing, delivering up to 96% ML performance uplift over CSS N2.
Key features
- ▸Pre-validated compute subsystem for faster time-to-market
- ▸Built on Neoverse V3 and CMN S3 for scalable performance
- ▸Chiplet-ready with native support for multi-die architectures
- ▸Up to 64 Neoverse V3 cores per subsystem
- ▸Up to 12 DDR5/LPDDR5 memory channels
- ▸64 lanes of PCIe Gen5 or CXL I/O
- ▸Supports Arm Confidential Computing Architecture for secure multi-tenant platforms
- ▸50% performance-per-socket uplift over CSS N2
- ▸96% uplift in machine learning workloads