A compact neural core for digital implementation of the Neural Engineering Framework

摘要

The Neural Engineering Framework (NEF) is a tool that is capable of synthesising large-scale cognitive systems from subnetworks; and it has been used to construct SPAUN, which is the first brain model capable of performing cognitive tasks. It has been implemented on computers using high-level programming languages. However the software model runs much slower than real time, and therefore is not capable of performing for applications that need real-time control, such as interactive robotic systems. Here we present a compact neural core for digital implementation of the NEF on Field Programmable Gate Arrays (FPGAs) in real time. The proposed digital neural core consists of 64 neurons that are instantiated by a single physical neuron using a time-multiplexing approach. As NEF intrinsically uses a spike rate-encoding paradigm, rather than implementing spiking neurons and then measuring their firing rates, we chose to implement NEF with neurons that compute their firing rate directly. The neuron is efficiently implemented using a 9-bit fixed-point multiplier without the requirement of memory, the bandwidth of memory being the bottleneck for the time-multiplexing approach. The neural core uses only a fraction of the hardware resources in a commercial-off-the-shelf FPGA (even an entry level one) and can be easily programmed for different mathematical computations. Multiple cores can easily be combined to build real-time large-scale cognitive neural networks using the Neural Engineering Framework.