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Hardware spiking neural network with run-time reconfigurable connectivity in an autonomous robot

Daniel Roggen, Stefan G. Hofmann, Yann Thoma, Dario Floreano

发表年份
2003
引用次数
68

摘要

A cellular hardware implementation of a spiking neural network with run-time reconfigurable connectivity is presented. It is implemented on a compact custom FPGA board, which provides a powerful reconfigurable hardware platform for hardware and software design. Complementing the system, a CPU synthesized on the FPGA takes care of interfacing the network with the external world. The FPGA board and the hardware network are demonstrated in the form of a controller embedded on the Khepera robot for a task of obstacle avoidance. Finally, future implementations on new multi-cellular hardware are discussed.

关键词

Field-programmable gate arrayInterfacingComputer scienceEmbedded systemReconfigurable computingFPGA prototypeComputer hardwareSpiking neural networkSoftwareComputer architecture

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