Valeri Kirischian

About

Valeri Kirischian is a researcher specializing in reconfigurable computing, embedded systems design, and fault-tolerant hardware architectures, with a particular focus on FPGA-based System-on-Programmable Chip (SoPC) platforms. His work addresses critical challenges in designing robust, adaptive computing systems for demanding application domains including robotics, aerospace, defense, and autonomous vehicles — fields where reliability and computational efficiency are paramount. Kirischian's most notable contribution centers on run-time structural adaptation methodologies that enable SoPC systems to dynamically mitigate power budget variations and hardware faults without interrupting operation. This research is especially significant for autonomous and mobile systems that must maintain functionality under unpredictable operating conditions and resource constraints. By developing techniques that allow FPGAs to reconfigure themselves in response to real-time hardware challenges, his work pushes the boundaries of what embedded systems can achieve in safety-critical environments. While his citation record is still growing — with his landmark 2018 paper accumulating 6 citations and a 2021 follow-up contributing further to the discourse — Kirischian's research addresses genuinely pressing engineering problems. Students and engineers working in autonomous systems, reconfigurable computing, or resilient embedded architectures will find his investigations into adaptive SoPC design both technically rigorous and practically valuable.

Research Focus

Key Achievements

Top Papers

1. 1
   Run-Time Mitigation of Power Budget Variations and Hardware Faults by Structural Adaptation of FPGA-Based Multi-Modal SoPC

   6 citations · 2018
2. 2
   Run-Time Mitigation of Power Budget Variations and Hardware Faults by Structural Adaptation of FPGA-Based Multi-Modal SoPC

   2 citations · 2021

Key Collaborators

Contact & Links