Parallel logical control algorithms: verification and hardware implementation.

Abstract

Abstract: A formal language (PRALU) has been proposed for representation of parallel algorithms for logical control. The paper contains a short description of its syntax and semantics, methods of checking PRALUalgorithms for correctness and methods for their hardware implementation. They include using suggested parallel automata as a standard form of algorithms, coding their partial states by ternary vectors, and obtaining appropriate minimized systems of logical equations of the sequent type. The latter ones could be easily implemented by logic nets with matrix structure. 1 Introduction A proper interaction between components of computers, industrial systems, communication nets, robotic complexes, etc., can be provided by logical control devices. They are discrete dynamic systems, exchanging information with controlled objects by means of logical variables. Generally speaking, these devices can be looked at as asynchronous systems controlling parallel and concurrent processes. They are diverse and their design implies the solution of numerous hard combinatorial problems. It is natural to begin the design of these devices with formulating a logical control algorithm, deriving it from a notion of the behaviour of a system that has to be put under control. The formal language PRALU has been proposed for the description of such algorithms [1,2].