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Hardware implementation of an ultrasonic beamformer

G. Hampson, Andrew P. Papliński

Year
2002
Citations
4

Abstract

This paper describes a FPGA based implementation of a Phase Shift Beamformer. To obtain high-resolution real-time images a fixed-point word-parallel pipelined CORDIC processor is used to compute the large number of complex multiplications needed. Analogue pre-processing amplifies, demodulates and samples outputs from a 16 sensor ultrasonic array. Suitable sensor geometries enable two and three dimensional images to be formed. The resulting scalable architecture could be utilised in a multitude of applications including medical imaging, virtual reality tracking, robot navigation and exploration.

Keywords

Computer scienceField-programmable gate arrayScalabilityComputer hardwareUltrasonic sensorComputer visionEmbedded systemReal-time computingAcoustics

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