Mapping processes to processors for space based robot systems

Abstract

A stepwise process is shown that maps a logical description of a system architecture onto a functional computer architecture based on a description of the application at hand and the response times required for that application. The response times are broken into execution and communication times to partially separate the application-dependent issues from the technology-dependent issues. An example utilizing the knowledge of the dominant response time required to aid in the selection process is given. Coupled with knowledge of the interfaces required and times of key operations taken from actual code on the target hardware, the system architect is provided with a powerful set of tools in the iterative procedure of assigning processes to processors. The use of algorithms or the addition of redundancy to the system can be examined before any of the system is actually built. This technique can be expanded to characterize an entire system for examining such issues as processor utilization, bus bandwidth, and dynamic process allocation.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>