Design and Implementation of Real-time Semantic Segmentation Network Based on FPGA

Abstract

With the rapid development of deep learning, the neural network of semantic segmentation has been developed towards the miniaturization of the network structure and the lightweight development of the network model. At the same time, FPGA-based neural network hardware accelerators have been proposed. The situation that the network module is too complex and computationally intensive to implement and apply on edge platforms is gradually being solved. However, the implementation of real-time processing network on the edge platform is still of great significance in many areas, such as robots, UAVs, driverless, etc. In this paper, a lightweight semantically segmented neural network Efficient neural network (E-Net) is designed and implemented on the image acquisition board with Zynq 7035 FPGA as processing unit, which achieves the frame rate of 32.9 FPS and meets the requirements of real-time processing.