A CMOS circuit implementation of a spiking neuron with bursting and adaptation on a biological timescale

Abstract

This paper proposes a silicon neuron circuit which uses a slow-variable controlled leakage term to extend the repertoire of spiking patterns achievable in an integrate and fire model. The simulations reveal the potential of the circuit to provide a wide variety of neuron firing patterns observed in neocortex, including adapting and non-adapting, regular spiking, fast spiking, bursting, chattering, etc. The firing patterns of basic cell classes are obtained with a simple adjustment of four biasing voltages. The circuit operates in the sub-threshold regime, with time constants similar to biological neurons, and hence is suitable for use in systems requiring such operating speeds. Envisaged applications of the proposed circuit are in large-scale analogue VLSI systems for spiking neural network simulations, brain-inspired circuits for robotics and hybrid silicon/biology systems.