Charge-Coupled Computing For Focal Plane Image Preprocessing

Abstract

A new class of charge-coupled devices called charge-coupled-computing devices is described. These analog circuits perform arithmetic functions such as addition, subtraction, and magnitude comparison in the charge domain. The circuits are compact and are designed to be insensitive to rail voltages, simplifying their utilization. These devices, in conjunction with input, output, and analog memory circuits, can be combined to form a simple but general-purpose and fully programmable charge-coupled computer. A prototype charge-coupled computer has been fabricated and tested. Prospects for forming a large array of computers (e.g., 1000 to 10,000) on a single chip for spatially parallel image preprocessing are discussed. Such image plane preprocessing of data would find use in real-time mobile robot vision systems, in which low power, lightweight computing is critical for economical viability.