Scalable FPGA-Based Convolutional Neural Network Accelerator for Embedded Systems

摘要

Convolutional neural network(CNN) and related deep learning algorithms represent the state-of-art ability in several computer vision tasks, such as image classification and video analysis. However, model complexity and massive computational operations restrain CNN deployment on embedded systems with limited computing capability and low power budgets including smartphones, drones and robots. In this paper, we propose a scalable FPGA-based CNN hardware accelerator for embedded systems based on 8-bit fixed point approximation of a hardware-friendly CNN model named SqueezeNet v1.1. Proposed FPGA accelerator is implemented with OpenCL framework and achieves 1.9x energy efficiency compared to previous work. Besides, performance and resource occupation of proposed FPGA accelerator are capable of being customized to fit in different FPGA platforms by changing a single hyperparameter.